Harry Cheung and Dan Kaplan
The triggering working group took as its main goal exploring the potential and feasibility of a vertex-based trigger for heavy-quark decays, both in collider and fixed-target modes. Co-convenor Harry Cheung introduced the working-group session by summarizing expected running conditions in C0. At the maximum luminosity of 2 x 1031 cm-2 s-1 for C0 in Run 2, the trigger must be able to handle 1-2 interactions per crossing, if the bunch spacing is 396 ns. However for 132 ns bunch spacing one would have to handle only one interaction per crossing on average. A rejection of the order of 1000 for the total trigger system is suggested simply by looking at the cost of data storage.
We then reviewed some previous experience with vertex-based triggers in E789 and WA92 (summarized by Dan Kaplan) and in SELEX (Peter Cooper). E789 built and operated a bend-view hardware vertex trigger processor [M. H. Schub et al., NIM A376, 49 (1996)], which achieved an (interaction-rate dependent) rejection as high as 20 for minimum-bias background interactions, with efficiency for D0->Kpi decays of about 35%. At high interaction rates the rejection factor degraded to about 5 due to the increased multiplicity of ghost tracks giving fake vertices downstream of the target.
A key point in considering vertex triggers is that a large portion of their inefficiency for signals of interest is correlated with that of vertex cuts which must be made off-line in order to enhance the signal-to-background ratio. Thus the only part of the trigger efficiency that matters is that for events passing off-line cuts. For E789 this efficiency was about 75%, due to requirements that tracks be detected in 4 silicon planes whose efficiencies were 90-95%. It is clearly desirable not to make such stringent requirements in the trigger, but due to constraints of time and manpower the E789 collaborators chose to do so in order to simplify the processor architecture.
WA92 also used a hardware vertex trigger processor [D. Barberis et al., Proc. CHARM2000 Workshop, FERMILAB-Conf-94/190, p. 213]. They achieved similar background rejection and charm efficiency as E789. Both the E789 and WA92 processors took of order 10 us/event to make their decision (12 us typical for E789 and 35 us for WA92). At the 4-MHz interaction rate of E789 a pretrigger was necessary to reduce the rate into the processor to a few tens of kHz. The pretrigger required evidence in hodoscopes and calorimeters of two high-pt hadrons of opposite charge.
It should be kept in mind that triggering on charm is harder than triggering on beauty, since 1) the shorter charm lifetimes mean smaller decay impact parameters; 2) the lower mass means lower p_t tracks must be considered; and 3) the multiplicity at the decay vertex is lower. Thus relatively low trigger efficiencies (<~50%) are to be expected for charm and especially for D0 and charm-baryon decays. But this is acceptable since it correlates with the off-line efficiency and the production cross sections are big.
Peter Cooper told us about the SELEX vertex trigger. SELEX uses a hardware pretrigger requiring a high-momentum particle in the spectrometer. Events satisfying the pretrigger are read out into a ~1 GB spill buffer for reconstruction on a 12-processor Challenge (~2000 MIPS), which has about 5 ms/event to find evidence of charm decay vertices and make a decision. They find that the hit multiplicity per event exceeds that anticipated by a factor of about 2, implying that 8 times as much computing power would be required to handle all events. To deal with this they have implemented an arbitrary cut on number of hits prior to event processing. The cut rejects about half of all triggers, thus imposing an inefficiency of about 50%.
It is worthwhile noting that the E789 and SELEX vertex triggers did not start with hits in the silicon vertex detector. Instead tracks reconstructed in downstream detectors which have lower multiplicity were used as seeds to look for tracks in the vertex detector.
III. Design study for BTeV vertex trigger
A substantial amount of work has gone into an "existence-proof" design for a vertex trigger processor for BTeV, aimed at reconstructing B decay vertices in a forward-collider geometry. Walter Selove described the approach, Don Husby described the proposed hardware implementation, and Steve Shapiro discussed the design and implementation of pixel detectors that could provide the needed input to such a processor.
Selove et al. have discussed their vertex processing approach in several papers [D. Husby et al., FERMILAB-CONF-95-170; W. Selove, UPR-0222-E, in Proc. Snowmass B Physics (1993); R. Isik et al., U. of Pa. Report UPR-234E (1996)]. They consider a vertex detector made up of 31 pixel-plane stations spread out in z along the interaction region. Each station consists of three pixel planes whose inner edges are a few mm from the beam. The entire vertex telescope is inside the analysis magnet and immersed in a field of order 1 Tesla.
The goal for BTeV is to find vertices in every interaction up to an interaction rate of order 10 MHz (luminosity of 1032 at sqrt(s) = 2 TeV). This entails an enormous data rate coming from the detector (~100 GB/s), thus a careful organization of the dataflow is crucial. The key idea is to segment the vertex detector into independent pieces and process the data from all segments in parallel. With a point or wire target one could envisage segmenting the detector in the non-bend view such that few tracks would cross segment boundaries. However, given the extended collider interaction region, only azimuthal segmentation is workable. Selove thus proposes to subdivide each pixel plane into 32 phi-slices, each of which will contain <1 track/event on average since a typical collider event sends about 10 charged tracks each into the forward and backward vertex telescopes. To handle the few percent of tracks crossing segment boundaries, hits near a boundary between two phi-slices can be sent to the processors for both slices.
Within each phi-slice the processing is carried out in three stages: hit finding, track finding, and vertex finding. The high speed of the system arises from the massively parallel use of inexpensive microprocessors. For example, at the hit-finding stage, a separate processor is allocated for each phi-slice in each detector station. Given the good position resolution of each measurement, a detector station determines not only a space point accurate to ~5 microns in x and y, but also x and y slopes, with the y (bend-view) slope accurate to ~1 mr. The hit processors thus output mini-track vectors, substantially easing combinatorics in the track-finding stage.
The processors in all three stages could be based on the architecture proposed by Crosseto for the SSC, or existing off-the-shelf processors could be used. MIPS now sells a 130-MIPS chip for $25. While lacking the enhanced floating-point operations needed for general-purpose CPUs, it is ideal for trigger processing, where limited resolution suffices.
The proposed algorithm starts from pixel-plane stations each consisting of three closely-spaced planes. Since the pixels under consideration have an oblong shape (e.g. 32 microns by 128 microns), the two outer planes in each station are oriented for best resolution in the bend view, and the inner plane for the non-bend view. Each phi-slice in each station sends its hit-pixel data via an optical fiber to its hit processor. The hit processor finds triplets of overlapping pixels and sends to the next stage x, y, dx/dz, and dy/dz for each triplet. The track processors then "stitch" together tracks from these track segments and send them to the vertex processors.
Since it is the low-transverse-momentum tracks that have the worst point-back resolution, they will tend to produce spurious apparent decay vertices and limit the rejection. To deal with this, tracks below an adjustable transverse-momentum threshold are ignored. With a py cut of 0.5 GeV, and requiring at least 3 tracks to exceed a 2.5-sigma y-impact-parameter cut, rejection of order 1000 is achieved for PYTHIA minimum-bias collider events while retaining around 50% of beauty decays. For charm the performance is worse, but comparable to that of previous experiments: requiring 1 track above 0.5 GeV py with 2.5-sigma impact parameter, rejection of about 10 can be achieved with about 25% efficiency for D0 -> Kpi. These results are preliminary and have not necessarily been optimized. They also do not take into account transverse beam spread, nor Moliere multiple-scattering tails.
It is desirable to have pulse-height information included with each hit so that interpolation can be used to improve the point resolution beyond the 32 microns/sqrt(12) otherwise available. Digital (1 bit) readout seems to be adequate for the p_y cut, but the improved momentum resolution with analog information would allow the processor to calculate the mass of the charged particles at a vertex, which may be a useful variable on which to cut. It also can improve the position accuracy for tracks incident at large angles, which cross over rows or columns of pixels.
Don Husby has worked out detailed designs for the three types of processor. In the existence-proof design there are 992 hit processors, 2048 track processors, and 128 vertex processors. Since the architecture is scaleable, there is flexibility for these numbers to be optimized to meet unanticipated conditions. The design uses a combination of FPGAs and MIPS CPUs. Timings:
hit processors 1/3 us/hit
track processors 10 us/track
vertex processors 16 us/vertex
Cost estimates depend on year built:
now in 4 years
hit processors $746k 233k
track processors 357k 131k
vertex processors 100k 70k
total 1203k 434k
Don anticipates that prototypes of all boards could be done this summer.
Steve Shapiro summarized his design for pixel detectors with a "data-push" readout architecture. He uses detector chips bump-bonded to readout chips. To minimize multiple scattering and secondary interactions, the readout chip can be back-thinned after bonding to about 50 microns thickness, giving a total thickness of about 200 microns of silicon (the bonding bumps are negligible). He has fabricated pixel planes and tested them in a beam giving 2.6 micron rms resolution with analog readout. Readout speed of 100 ns/hit, time stamping to 20-25 ns (10 ns walk from twice threshold to infinite pulse height), and noise of 70 electrons can be achieved. These performance specifications are believed adequate for BTeV or C0. More chip design (the "digital periphery") is still needed but awaits funding. He wants to do a beam test this summer with PC boards substituting for not yet available chips.
Paul LeBrun presented the "heretical" notion that since the charm cross section is so big at collider energy (claimed 2% of total cross section in Schlein's SPS test), an interesting charm experiment can be done without a trigger by running at 50 kHz interaction rate and processing all events in an on-line farm - essentially run the first-level filter program on-line. Based on E831 experience he believes this is feasible. This implies 1 kHz charm production or 10^10 charm events/year. With typical branching ratios and efficiencies, could this give 10^-4 mixing sensitivity?
It was thought in the working group that given such an on-line filtering capability, one would not necessarily want to spend all available running time without a lower-level trigger, though certainly some time should be spent this way in order to obtain a data sample with as little bias as possible. Having the high-bandwidth filtering LeBrun proposes will ease the rejection requirements of the vertex trigger.
It was difficult to focus on trigger issues during the discussions because of questions of a more global nature. The main question was whether a competitive charm experiment is compatible with a beauty experiment. This is relevant when considering what one wishes to concentrate on or optimize for in the trigger. Clearly running in fixed-target mode with a wire target has some different concerns than running in collider mode too. The other major concern was that any venture at C0 should be able to produce good physics publications in order to support graduate students and university professors.
A concern was raised that one could not get a realistic design of the trigger architecture before a number of questions were considered. It was thought that a goal of the workshop should be to come up with the questions that would address this issue directly so people could start working on the answers that would determine the trigger architecture, e.g. some basic questions are:
1) How many trigger levels are needed?
2) What is the rejection needed at each stage?
This depends on the event size/bandwidth, what detector information is needed at each stage, the latency of each stage, etc.
3) Cost of each stage?
This could depend on the size of the pipeline needed, etc.
The focus of the discussions was on vertex triggers and pixels. This arises naturally when one considers for example the goals of the BTeV proposal. To be competitive at such high rates BTeV must use a vertex trigger at level 1. To be able to use a vertex trigger at level 1, it seemed to be generally thought that one had to use pixels to reduce combinatorics. Also it makes sense when one considers that one of the goals of the C0 project would be new R&D. Clearly vertex triggers at level 1 using pixels would be a new type of R&D project, and one that is clearly useful in the future.
Although there was much work already done looking at the feasibility of a vertex trigger for BTeV, there were still many questions raised and more suggestions for simulations; some of the suggestions included:
1) Include multiple interactions per crossing
2) Include "overlapping" phi regions in reconstruction code
3) Look at effect of separated beams (e.g. if no low beta insertion)
4) Evaluate potential gain from silicon planes further from the collision
5) How can the system be optimized?
6) How can the system be optimized for charm?
7) How gracefully and in what situations does the system fail?
8) Include a more realistic simulation without idealized beam and detectors, and include extra hits. Maybe look at collider minimum bias events.
Besides a vertex trigger, other triggers were discussed as possible pretriggers preceding a vertex trigger, as separate triggers for physics, and for use in studying the vertex trigger. These other triggers included leptons, high p_t tracks and high transverse energy. The concerns about a pretrigger were whether one could take the hit in efficiency for beauty. For charm, these pretriggers are normally worse than for beauty. However it was suggested that pretriggers may be more useful in a fixed-target running mode with a wire target.
1) More realistic simulations
2) Simulations under different running conditions (e.g. wire target)
3) Performance for Charm
4) Optimization for Beauty and Charm
Further the group felt that real beam tests are needed, not only in a fixed-target beam facility but in a collider environment too, preferably during Run 2. In order to achieve this it was argued by the group that one needed
a) Aggressive R&D on trigger processors and
b) Aggressive R&D on pixel detectors
The group felt that these are important new R&D projects falling within the C0 workshop goals of advancing R&D in this field.
Updated 1/31/97 - M. Smith (oboe@fnal.gov)