E907 BTOF Notes

Contents

Date	Author	Summary
1/9/04	Peter Barnes	Rough specification list
1/12/04	Sten Hansen	TMC native time bin width is 0.750 ns
1/13/04	Sten Hansen	Block diagram, specifications
1/15/04	Tim Bergfeld	Use 1/2 bin = 0.375 ns
1/15/04	Peter Barnes	Detailed calculation of p-K-π bin differences
1/15/04	Sten Hansen	First data from 0.750 ns bins
1/15/04	Peter Barnes	Fit to data
1/16/04	Sten Hansen	Stability/jitter issues
1/30/04	Heide Schneider	Data from 0.375 ns bins
2/2/04	Peter Barnes	Fit to new data, additional specifications
1/27/04	Heide Schneider	More data from 0.375 ns bins
3/15/04	Tim Bergfeld	Comments on scope trace jitter
3/15/04	Peter Barnes	Partial jitter explanation
3/15/04	Peter Barnes	Full jitter explanation - look at level, not edge
3/15/04	Tim Bergfeld	Need to stabilize output time
12/13/04	Sten Hansen	Programming the Module

From: Peter Barnes
Subject: T0 trigger module
Date: 1/9/04

Hey Sten,

	I just wanted to summarize our conversation about the T0 trigger module.  
The main action item is you will send us (me and the cc list above) a spec 
list on Tuesday.  The approximate parameters will be:

- 2 NIM inputs on BNC
	(discriminated signals from T00 and T01, ~20 ns apart)
- basic time stamp will be 1/2 clock period = 0.78 ns,
	average error is 0.78 ns/ sqrt(12) = 0.22 ns
- internally compute difference of two inputs
	average error of 0.22 ns * sqrt(2) = 0.32 ns
- 2 NIM outputs, ~25 ns long (fixed width, TBD)
	output is high if difference is in a window
	(these will correspond to proton or kaon at 5 GeV)
- window position and width set by serial port control strings
- propagation delay from second input to logic output ~100 ns (TBD)

- NIM format module?

Have I missed anything? 
	

From: Sten Hansen 
Subject: T0 trigger module
Date: 1/12/04

Hello Peter:
	The binning of the TMC chip is 0.75 ns. Is this good enough for
your measurement, or do you need 0.375 ns binning?

				Sten.
	

From: Sten Hansen
Subject: T0 trigger module
Date: 1/13/04

Hello Peter:
	Attached is a block diagram and slightly amended version of your
note. Heide Scheider, our co-op is has setup the NIM inputs and is
measuring the rms without 1/2 binning. The next step is to add the 1/2
binning and measure again.

					Sten.
	

General:

2 NIM inputs on BNCs

• TDC binning is clock period (24ns) div 32 = .75 ns. 1/2 bin = 0.375 ns,
• assuming perfect binning, rms error is 0.375 ns/sqrt(12) = 0.108 ns
• internally subtract arrival times of two inputs
• because of 2 independent measurements, rms error is sqrt(2) worse or 0.153 ns
• For TDC chip details see: the TMC Manual
• We will measure resolution after modding board.

2 NIM outputs, 24 ns wide fixed width

• output 1 is pulsed if time difference is within window 1 (coarse window?)
• output 2 is pulsed if time difference is within window 2 (fine window?)
• deadtime is = width of coarse window. After a receipt of a pulse at input 1,
• any pulses at input 1 are ignored until after the coarse window time has elapsed.

RS-232 accessible registers for upper, lower limits on window 1 and window 2

• 8 significant bits which gives a span of 95ns
• propagation delay from second input to logic output ~100 ns (24 ns uncertainty because internal clock is asynchronous to inputs)

NIM module

Possible options:

• Ability to lock to external reference (53MHz).

RS-232:

• Two letter command code followed by parameters. e.g.

  WR 0 3f

  write register at address 0 with a value of 3f.

  RD 0

  would send back value at address 0.

• Define Addresses 0..3 for upper and lower time values of 2 windows
• It would be possible to keep a trace buffer with raw time values from say, 128 events readable from RS-232 for diagnostic purposes.

From: Tim Bergfeld 
Subject: Re:  T0 trigger module
Date: 1/15/04

Peter and Sten,
	I see no reason not to try for the 0.375 ns binning, if this is
not an inordinate amount of work.  Looking at the K/proton separation
at 5 GeV gives 4 bin separation at 0.75 which might work but at 10GeV
there will only be one bin separation which is too small.

Tim
	

From: Peter Barnes
Subject: T0 trigger module
Date: 1/9/04

Hey Sten and Tim,

	So, if I understand Sten's notes for our BTOF system: 

1.  The Quarknet clock has a 24 ns period (41.667 MHz).

2.  The TMC chip multiplies this by 32, giving a period of 0.750 ns.

3.  By using two channels with a half-period delay, the FPGA will 
compute time stamps with a bin size of 0.375 ns.

4.  The errors look like this (all times in ns):

						Max		rms
Single channel (T00 or T01 counter)
	time stamp bin / 2			0.188
	time stamp bin / sqrt(12)				0.108

Time of flight (T01 - T00)
	2 	* max single ch.		0.375
	sqrt(2) * rms single ch.				0.153


5.  Consider the delays at 5 GeV/c:

						p - K		K - pi
Delays @ 5 GeV/c
	proton wrt kaon				2.39
	kaon wrt pion						0.85

With maximum TOF error
	Plus  max TOF error			2.765		1.224
	Minus max TOF error			2.015		0.474

In FPGA time stamp bins
	plus  max TOF error			7.37		3.26
	minus max TOF error			5.37		1.26

In round bins for windows
	window stop				8		4			
	window start				5		1


6.  There are other errors we could include, but I think they are small:

instrinsic counter resolution			0.1 ns?  <-- not small!
beam momentum spread				1% rms?
particle trajectory path length			~10^-8


7.  In answer to Tim's first question, your proposal uses 0.375 ns binning
in the FPGA from using two channels of the TMC for each input.

At one time we had also talked about using all four channels of a TMC for 
each counter, giving an FPGA time stamp of 0.094 ns, cutting all errors 
in half.  This would require 2 TMCs, however.  Sten, can you remind me how 
much more involved this would be?  I think it requires a new board, since 
the Quarknet boards have only one TMC.


8.  At 10 GeV/c (and above) we have positive pion and kaon tags from the 
BCKOV.  Therefore we don't need to tag protons vs. kaons with the BTOF 
system (Tim's second question). 

For trigger purposes at 10 GeV/c (and similarly above) we can either:

	a.  Assume that beam particles without BCKOV tags are protons.  In 
	fact they will be protons:pions = 3:1 which can be included in the 
	prescaling.  Since kaons are a small fraction of the raw beam at T01
	(due to decay in flight), BCKOV inefficiency leads to a 1% 
	contamination of the proton tag, which can also be included in the 
	prescaling.

	b.  Also require that the particle be in a proton window in the BTOF.  
	As Tim notes, this won't help much with proton:kaon or proton:pion, 
	but it may help knock down other stuff (muons, electrons in the beam?  
	will these light up the BCKOVs?)

Peter
	

From: Sten Hansen
Subject: TDC binning
Date: 1/15/04

Hello Peter:
	You are correct. There is only one TMC chip per quarknet board. I
also think that the bin edges aren't accurate enough to justify 1/4 bin
delays. Attached is data Heide collected for 5 time differences stepped by
1/2 ns with the default TMC binning. She is now in the process of
repeating the exercise for 1/2 binning.
					Sten.
	

Attachment: TMCtst1.xls ( Excel html)

From: Peter Barnes
Subject: Re: TDC binning
Date: 1/15/04

Hey Sten,

	I think I see what you mean about bin edges / stability / noise.

	For each delay I computed the mean and stdev of the bin distribution:

Delay	Mean	Sigma
(ns)	(    bins    )
22.0	30.33	0.47
22.5	31.04	0.31
23.0	31.69	0.46
23.5	32.33	0.47
24.0	32.98	0.24
24.5	33.65	0.50
25.0	34.30	0.46

An unweighted linear fit to the means gives 0.7596 +/- 0.0044 ns per bin, 
with chi^2/dof = 1.4.  This corresponds to a clock frequency of 
41.1425547 MHz.

	So why the large sigmas?

 - how stable is the clock?
 - how stable is the pulser?
 - what is the input pulse rise time?

Peter
	

From: Sten Hansen
Subject: Re: TDC binning
Date: 1/16/04

Hello Peter:
  - how stable is the clock?

	The clock is from a temperature compensated crystal. There are
some long term (20us) variations that come from the multiplying pll that
we use to derive 41 2/3 Mhz from the 12 1/2 Mhz crystal. I don't think
that affects our measurement. In any case, it will go away when we kludge
the board into a NIM module, since it is the the on board switched
capacitor +5 to -5 converter that cuases the problems.

  - how stable is the pulser?
	I don't know, but it has delay steps of 50ps.

  - what is the input pulse rise time?
	Less than 2ns.

	My guess is that switching noise on the power lines feeds into the
signal at the input comparator. I also don't think the rms's are that
wide. I would naively expect .31ns. Heide is putting the 1/2 bin data
into the spread sheet. Lets see what that looks like.

				Sten.
	

From: Heide Schneider
Subject: Re: TDC binning
Date: 1/30/04
	

Attachment: Delayvs.5binfreq.xls ( Excel html)

From: Peter Barnes
Subject: Re: TDC binning
Date: 2/2/04

Hello Heide and Sten,

	Thanks for the update last week, and the new data with 1/2 TMC bin 
size.  I did the same analysis as before, computing the mean and stdev 
of the bin distribution.  With single TMC binning I computed a 316 ps 
rms.  Now, with 1/2 bin size, I compute 251 ps.  (See the plot below.)

	The other points we discussed:

1.  We will guarantee that our two inputs, T00 and T01, will be *less 
than 24 ns* apart.  This simplifies the logic, since you know the second 
signal will be at most one clock cycle behind, but not more.  This will 
set a fixed gate for computing the time difference - 2 clock periods.

2.  You (Sten) will work on the "equations."  You will make the two 
windows for each output completely independent.

3.  The NIM module looks great.  You will (eventually) build a spare.

Anything else?

Thanks,
Peter
	

File: BTOF Timing Data.xls ( Excel)

From: Heide Schneider
Subject: Re: TDC binning
Date: 2/27/04

Hi,

I've included a spreadsheet with the input delay of the two inputs versus
the triggers.  A 1 indicates there has been a trigger and a 0, no trigger.
Also attached is a snapshot of the input trigger with the delayed output
trigger.  Ch.1 being the second of the input triggers, and channel 2, the
lemo of the trig out.

-Heide Schneider
	

Attachment: BTOF Timing Data.xls ( Excel)

From: Tim Bergfeld
Date: 3/15/04
Subject: Re: TDC binning

Peter,
	I have looked over the measurements and am not sure what
the next step is. The plots she gave for the output from the scope
traces shows that the delay is from 142ns to about 165ns if I 
understand the pink traces correctly.  Do we understand why the
output seems to have a variable time? 

Also, I am not sure what the configureation is for the trigger
numbers, I am assuming that it is with the half clock bins. If that
is the case we need about 1ns between the two particle species for
good separation (~3sigam) when including the T0 resolution which
is probably fine for the 5GeV where the protons and kaons should be
3 ns apart.  However, I have some concerns about 10GeV since then
the separation is 0.75ns.

Is there some concerns that you still had?  The next step I guess is
to use the board in MIPP. 

Tim
	

From: Peter Barnes
Date: 3/15/04
Subject: Re: TDC binning

Hey Tim,

	The jitter comes from the fact that the input and clock are 
asynchronous.  To get the time resolution I think you have to look
at the spreadsheet and fit the width of the transition from bin 0 
to bin 1.  When I do it (crudely) I get ~317 ps.  Maybe you want 
to check with her what the binning was.

	I thought this was only essential at 5 Gev, where the BCKOVs 
only tag pions.  At 10 GeV they tag pion and kaon, so we don't have 
to be so good with the BTOF.

	Will you be getting the board from her and setting it up in MC7?

Peter
	

From: Peter Barnes
Date: 3/15/04
Subject: Re: TDC binning

Hey Tim,

	The resolution is not degraded by the asynchronous clock!  The 
board puts out a *level* when the time difference is in a window.  
The output edge in Heide's scope trace carries no information; only 
the level is meaningful.  (Well, alright, the edge carries the phase, 
but that means nothing here.)

	You have to determine the resolution from the fraction of outputs 
with the correct level as a function of input time difference.  Have 
you taken a stab at understanding the data in her spreadsheet?  For a 
range of time differences, she tabulated the number of high/low outputs.  
The transition probability looks like [the figure below].

This curve is the integral of the resolution function; the width of this 
transition is the resolution.  So the question is, what is a good 
estimate of the width?

	I might be able to pick it up this week.  If I do, I'll let you know.

Peter
	

From: Tim Bergfeld
Date: 3/15/04
Subject: Re: TDC binning

Peter,
	I was not aware that this was a level. However, if we are going to
use it in the trigger, we probably need to stabilize the output time so
we know when to look at it. Do you know who the output pulse charactersistics
are determined?  The level looks like it was only stable for a very short time
in scope traces from Heidi.  Each pulse looks like it was around for 40ns but
the variation between pulses only gave a small time overlap that can be used
in the trigger to ensure we look at the right time. Perhaps we will have to 
do something about it ourselves since there are no clocks etc. in the trigger
to time it with the rest of the signals.

I understood the spread sheet information as you have plotted
it. However, my comment was that it looks like if we want to go from
about 99% no signal to about 99% signal occuring, then we have to have
1ns between the two particle species. I guess this is not correctly a
resolution but an observation based upon how we will use it.  Thus at 10GeV
we will be getting some contamination in our PID measurements but you
say this is not needed. 

Tim
	

Hello Tim:
        I don't know if there is and actual document for this thing. The
programming I think is simple enough. There are four 8 bit registers that
set the limits of the 2 time windows. They can be set from the debugger by
typing WR X YY where X is a number from 0 to 3 and YY is a number from 0
to 0xFF. The TDC value of the rising edge of hit on input 0 is subtracted
from the TDC value of the rising edge of a hit on input 1. The time
difference is compared to values stored in registers 0..3. The chan 0
ouput fires if the delta time is greater than the value in register 0 and
less than or equal to the value stored in register 1. For chan 1, the
output fires if the delta time is greater than the value in register 2
and less than or equal to the value in register 3. The least count for
the registers is units of TMC counts div 2 which is .375ns) Output 0
compares the delta time to the values stored in registers 0 and 1. Output
1 compares the delta time to the values stored in registers 2 and 3. Typing
RD X should display the contents of the registers.
        There is a fixed width digital oneshot fired by a hit on input
0 which is set to 4 TMC clock ticks (96 ns). If there is no hit on
input 1 within that interval, the delta T  logic resets and looks for
another hit on input 0.
        I hope this is enough to get you going. If not, I can take one of
the units and checks its operation on the bench.


                                Cheers,

                                        Sten.

	

PDB, 5/25/04