ASIC Presentations
 
Details of the First 3D-IC Multi-Project Wafer Run 
 By G. Deptuch, M.Demarteau, J.Hoff, 
R. Lipton, R. Patti, A. Shenai, M. Trimpl, R.Yarema, T.Zimmerman
<> IEEE NSS-MIC, Knoxville, TN 
 October 30 - November 6, 2010
 
SOI Detector with Drift Field due to Majority Carrier Flow - an Alternative to Biasing in Depletion
 By M. Trimpl, G. Deptuch, R. Yarema
<> IEEE NSS-MIC, Knoxville, TN 
 October 30 - November 6, 2010
 
Monolithic Active Pixel Matrix with Binary Counters 
 By Farah Khalid, Gregory Deptuch, Alpana Shenai, Raymond Yarema
<> IEEE NSS-MIC, Knoxville, TN 
 October 30 - November 6, 2010
 
3D SOI Design at FermiLab MAMBOIII 
 By Farah Khalid, Alpana Shenai, Gregory Deptuch, Raymond Yarema
 <> 19 th International Workshop on VERTEX Detectors, Loch Lomond, Scotland 
 June 9, 2010
 
3D SOI Design at FermiLab MAMBOIII 
 By Farah Khalid, Alpana Shenai, Gregory Deptuch, Raymond Yarema
 <> Monolithic Active Pixel Matrix with Binary Counters 
 March  4, 2010
 
MAMBO III User Manual 
 By Farah Khalid, Alpana Shenai, Gregory Deptuch 
<> Microelectronics ASIC Design 
 March, 2010
 ATLAS-CMS Power Working Group 
 By M. Trimpl <> Recent SPi tests and setups 
 March 31, 2010
 
Frontend Electronics in SOI at FERMILAB 
 By Farah Khalid, Alpana Shenai, Gregory Deptuch, Raymond Yarema 
<>  Monolithic Active Pixel Matrix with Binary Counters 
 April 25, 2010
 3D-IC Technology for Future Detectors 
 By Grzegorz Deptuch 
 February 17, 2010
 
 Discussion of process features to target optimum monolithic SOI Pixel Detectors 
 By Grzegorz Deptuch  <> Monolithic Pixel Detectors in a Deep Submicron SOI Process, TIPP, Tsukuba, Japan 
 March 11, 2009
 
 Serial Powering Using the SPi Chip 
 By M. Trimpl <> Front End Electronics, Montauk, New York 
 May 19, 2009
 
 Opportunities for HEP Instumentation Using 3D Circuits 
 By Ray Yarema <> TIPP 2009, Tsukuba, Japan 
 May, 2009
 
 FPhx Digital Architecture Review Checklist 
 By Jim Hoff <> Front End Electronics, Montauk, New York 
 May, 2009
 
 3D Design Activities at Fermilab and Associated Opportunities for Physices 
 By Ray Yarema <> For 11 th Pisa Meeting on Advanced Detectors, La Biodola, Isola d'Elba, Italy 
 March, 2009
 
 Development of Vertically Integrated Circuits for Particle Detectors
 By M. Trimpl <> For Symposium on Semiconductor Detectors, Wildbad Kreuth, Germany 
 June 10, 2009
 
 3D Circuit Design at Fermilab 
 By Ray Yarema <> For Vertical Integration Technologies for HEP and Imaging Workshop, Tegernsee, Germany 
 April 6-9, 2008
 
 3D Technology Issues and On-going Developments at FNAL 
 By Ray Yarema <> For ILC Vertex Workshop, Mennagio, Italy 
 April 23, 2008
 
 3D and SOI Integrated Circuit Design at Fermilab for HEP and Related Applications 
 By Ray Yarema and G. Deptuch <> For 2008 NSLS/CFN Users Meeting, Workshop on Detectors, Brookhaven 
 May 21, 2008
 
 Vertical Integration of Integrated Circuits and Pixel Detectors 
 By Grzegorz Deptuch <> For 17 th International Workshop on Vertex Detectors, Uto Island, Sweden 
 July, 2008
 
 3D IC Pixel Electronics-the next challenge 
 By Ray Yarema <> For TWEPP-08, Naxos, Greece 
 September 15 - 19, 2008
 
 The SPI(Serial Powering Interface) Chip 
 By M. Trimpl <> For TWEPP Workshop, Naxos, Greece 
 September 17, 2008
 
 First Results of SOI-based Integrated Detector and Electronics at Fermilab 
 By M. Trimpl, G. Deptuch, R. Yarema <> For LCWS, chicago, Illinois 
 November 17, 2008
 
 SOI Detector and 3D Integrated Circuit Development for HEP
 By Ray Yarema <> For ILC Pixel Group at FNAL 
 February 22, 2007
 
 3D and SOI Technology for Future Pixel Detectors 
 By Ray Yarema <> For Common Atlas/CMS Electronics Workshop, CERN 
 March 19-21, 2007
 
 3D Circuit Integration of Vertex and Other Detectors 
 By Ray Yarema <> For Vertex 2007, Lake Placid, New York 
 September 25, 2007
 
 3D Circuit Integrated Circuit for Pixel Applications in High Energy Physics 
 By Jim Hoff, Grzegorz Deptuch, Tom Zimmerman, Ray Yarema <> For NSS 2007, Hawaii 
 October, 2007
 
 Review of 3D Related Technologies for HEP 
 By Ray Yarema <> For LHC-ILC Workshop on 3D Integration Techniques, Paris, France 
 November 29, 2007
 
 Development of 3D Integrated Circuit for HEP
 By Ray Yarema <> 12th LHC Electronics Workshop, Valencia, Spain 
 September 25-29, 2006
 
 3D Integrated Circuits for HEP
 By Ray Yarema <> Sixth International Meeting on Front End Electronics in Perugia, Italy 
 May 17-20, 2006
 
 Fermilab Initiatives in 3D Integrated Circuits and SOI Design for HEP
 By Ray Yarema <> ILC Vertex Workshop Ringberg Castle in Tegernsee, Germany 
 May 29-31, 2006
 
 The NOVA APD Readout Chip
 By Tom Zimmerman <> FEE 2006 in Perugia, Italy 
 May 19, 2006
 
 Single Event Upset Tolerance in IBM 0.13um
 By Jim Hoff <> 5th Int. Meeting on Frontend Electronics in Perugia, Italy 
 May, 2006
 
 A New Prototype 10u by 340u Pixel Cell in 
a 0.13u CMOS Process for Future HWP Application  
By Abder Mekkaoui, Jim Hoff, Ray Yarema. <>
     Pixel 2005, International Workshop on Semiconductor Pixel
     Detectors for Particles and Imaging in Bonn, Germany
    September, 2005
 
 A Custom Integrated  Circuit
for Calorimetry at the International Linear Collider 
By Jim Hoff, Abder Mekkaoui, Ray Yarema
Fermi National Accelerator Laboratory; Gary Drake, Jose Respond Argonne National Laboratory. <>
    IEEE NSS 2005, Puerto Rico
    October 25, 2005
 
 FSSR2, a Self-Triggered Low Noise Readout Chip for Silicon Strip Detectors 
By Valerio Re, Massimo Manghisoni Universita di Bergamo and
INFN, Pavia, Italy; Jim Hoff, Abderrezak Mekkaoui, Raymond Yarema
Fermi National Accelerator Laboratory; Lodovico Ratti Universita di Pavia and INFN, Pavia, Italy. <>
    IEEE Nuclear Science Symposium, Puerto Rico
    October 24 - 27, 2005
 
 
Challenges in Front-end Electronics for Future HEP Experiments  
By R. J. Yarema. <>
     14th International Workshop on Vertex Detector Nikko, Japan
    November, 2005
 
 
ASIC Research and Development at Fermilab  
By Ray Yarema. <>
    Super B Factory Workshop in Honolulu, Hawaii
    April 20-22, 2005
 
 
Fermilab ASIC and electronics R&D for Linear Collider  
By William Wester, Ray Yarema. <>
2005 International Linear Collider Workshop 
Stanford University, California
March 18-22, 2005
  
Fermilab Silicon Strip Readout Chip for BTEV.  
By Ray Yarema, Jim Hoff, Abderrezak Mekkaoui, Massimo Manghisoni, Valerio Re
, Valentina Angeleri, Pier Francesco Manfredi, Lodovico Ratti, Valeria Speziali. <>
     Nuclear Science Symposium. 
 
  
The Future of Deep Submicron IC Design for HEP.  
By Ray Yarema. <>
    9th; Workshop on Electronics for LHC Experiments.
 
  
Testing Experience with TSMC 0.25 µm.  
By W. Wester. <>
     FEE2003.
  
Trip Chip.  
By Paul Rubinov. <>
     FEE2003.
  
A New Deep Submicron Readout IC for the Tevatron  
By Brad Krieger, M. Garcia-Sciveres, C. Haber, H. von der Lippe, E. Mandellie
, M. Weber, L. Christofek, K. Hanagaki, J. Hoff, M. Johnson, A. Nomerotski
, P. Rapidis, M. Utes, W. Wester, R. Yarema, T. Zimmerman, S. Alfonsi
, N. Bacchetta, S. Centro, G. Meng, D. Pellet, T. Wilkes, W. Yao. <>
     FEE2003.
  
Test Results from the SVX4.  
By Len Christofek(University of Kansas). <>
     FEE2003.    
  
SEU Tolerance of Different Register Architectures in a 0.25µm CMOS Process.  
By Jim Hoff, William Wester, Brad Hall, Paul Rubinov, Suen Hou, P.K. Treng. <>
     FEE2003.
  
The Design of a Charge Integrating, Modified Floating Point ADC Chip for Calorimeters.  
By Tom Zimmerman. <>
     FEE2003.
 
  
FPIX2: A Pixel Readout Chip with 840 Mb/s IO bandwidth.  
By A. Mekkaoui, J. Hoff, D. Christian, R. Yarema. <>
     FEE2003.
  
Readout Ideas for Phenix Silicon EndCap.  
By R.J. Yarema, Jim Hoff, Abder Mekkaoui. <>
     Phenix Collaboration Meeting.
  
A New Floating Point Readout Chip for CMS Calorimeters.  
By R. Yarema, T. Zimmerman. <>
     9th Workshop on Electronics for LHC.
 
  
SVX4 Silicon Readout Chip for Fermilab.  
By R.J. Yarema. <>
    Phenix Collaboration Meeting.
  
Highlights of the 5th International Meeting on Front End Electronics.  
By Ray Yarema. <>
    Vertex 2003.
  
Channel Control ASIC for the CMS Hadron Calorimeter Front End Readout Module.  
By Ray Yarema, Alan Baumbaugh, Ahmed Boubekeur, John Elias, Theresa Shaw. <>
    7th Workshop on Electronics for LHC.
 
  
Radiation Test Results of Pixel Circuits Built in Two Different 0.25 µ Processes.  
By Abderrezak Mekkaoui, Jim Hoff, Dave Christian, William Wester, Ray Yarema. <>
     RD-49 Meeting.
  
Wafer level Testing of ASICs for Silicon Strip Detectors.  
By Ray Yarema, William Wester. <>
     4th International Meeting on Front End Electronics for Tracking Detectors 
     at Future High Luminosity Colliders.
  
preFPIX2: Core Architecture and Results.  
By J. Hoff, A. Mekkaoui, D. Christian, S. Zimmerman, G. Cancelo, R.Yarema. <>
     Nuclear Science Symposium, Lyon France.
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