ASIC Images
Name: Trigger Pipeline + Timing(TRIP_T) | Designer: A. Mekkaoui |
Process: TSMC 0.25µ CMOS | Experiment: D0 |
Febrication Date: 2005 | Size: 4.8 mm x 4.6 mm |
The TRIP_T is similar to the TRIP chip except that it incorporates circuitry that gives timing information on when a hit occurred. The chip required a major design and layout change to the TRIP chip. | |
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- Last modified
- 01/16/2018
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